A liquid crystal panel used in a liquid crystal display device includes a pair of glass substrates and a liquid crystal layer sandwiched between the glass substrates. One of the glass substrates is an array substrate including TFTs as an active element that controls operations of each pixel. A plurality of gate lines and source lines are arranged in a matrix in a display area of the array substrate and the TFT is arranged at each intersection of the gate lines and the source lines. A check line, a line connection portion, and a check signal input portion are arranged in a non-display area that surrounds the display area of the array substrate. The check line is used for checking disconnection or short-circuit of the gate lines or the source lines in the process of manufacturing the array substrate. The line connection portion connects the check line and each line. The check signal input portion is connected to the check line and a check signal is input from via the check signal input portion. The check line, the line connection portion and the check signal input portion are removed after a checking step in the process of manufacturing the array substrate. The method of manufacturing the array substrate is described in Patent Document 1.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2002-90424